Work Experience

Analog Design Engineer

Semtech-Snowbush IP

June

2013 - Present

Design Engineer

Qualcomm

February

2011 - June 2013
Circuit-level design of embedded memories, for full-range compilers and custom macros. Designed embedded SRAM pseudo dual port (PDP) in 20nm, ROM in 28nm CMOS. Developed a Time-to-Digital Converter (TDC) in 20nm CMOS, with picoseconds resolution.

Teaching Assistant

University of Toronto

September

2009 - December 2010
ECE534 - Integrated Circuit Engineering ECE331 - Analog Electronics ECE110 - Electrical Fundamentals

Research Assistant

University of Toronto

September

2007 - December 2010
- High-speed, STT-MRAM design in 90nm cmos - MTJ-based non-volatile Flip Flops - Low-power 90nm Ternary CAM

Education

University of Toronto

M.A.Sc, Electronics

2008 - 2010

Thesis: spin-torque transfer magnetoresistive random access memory and non-volatile flip flops. In collaboration with Fujitsu Labs Limited, Atsugi, Japan.

University of Toronto

B.A.Sc, Electrical Engineering

2003 - 2008